LEE Flash-ZT : Zero Mask Flash

Feature


Up to 1kB densities
Up to 100k P/E cycles
No additional mask required
Standard Poly CMOS
Simple IP architecture design
Support IDM original process
Data retention: 10 years @ 150C
FN tunneling for P/E



Advantage


Lowest cost in the market

   No additional Mask required on Standard CMOS process
      CMOS gate poly for floating gate
      N-Well for Control gate
   Short test time (less than half of existing solutions)
   Small IP area

Easy to Embed

   No Additional Mask on Standard CMOS process

Extremely low power program and erase

   Less programming current (1/1,000,000)

Supporting high reliability design requirement

   1bit with complementary 2 cells